Accellera announces release of PSS 2.1 to improve chip design automation

After a bit gap Accellera Systems Initiative has approved the latest Portable Test and Stimulus Standard (PSS) 2.1., which can be downloaded from https://accellera.org/. “Industry adoption of the PSS standard continues to rise across the globe as new features are added to help increase productivity,” stated Lu Dai, Accellera Chair. “It is our mission to deliver standards that help to improve the design automation process, and PSS 2.1 brings even more productivity and usability to the system-level design and verification community.” PSS benefits: Reduced test development costs with portability and rapid creation of complex tests, describe and share SOC configuration Inter-IP initialisation and power sequencing at high-level, enables effective communication through its semantics and constructs, better post silicon bring up and validation. Understanding every detail of SOC is not required with PSS partial scenario specifications. PSS supports creating a single representation of stimulus and test scenarios, usable by a variety of users across many levels of integration under different configurations. This representation facilitates the generation of diverse implementations of scenarios that run on a variety of execution platforms, including simulation, emulation, FPGA prototyping, and post-silicon. With this standard, users can specify intent once and observe consisten...