Semidynamics and SignatureIP jointly offer Ips for RISC V based muticore AI chips

Two emerging semiconductor IP vendors Semidynamics and SignatureIP have joined hands in offering fully-tested RISC-V, multi-core environment and CHI interconnect for the development Advanced multi-core RISC-V chips for AI and ML applications. Semidynamics’ CEO and founder, Roger Espasa, said, “Working closely together with other members of the RISC-V community is one of the driving forces of RISC-V’s rapidly growing success. There is a natural synergy between the two companies that has resulted in a solution that enables cutting edge, multi-cores chips to be created. SignatureIP’s C-NoC CHI interconnect solution makes it very straightforward to lay out the Network on Chip (NoC) for multiple cores on a chip using our mature, proven technologies which minimizes risks and accelerates time to market.” Semidynamics offers ultra high-bandwidth RISC-V processor IP cores namely Atrevido, a 64-bit RISC-V Core which is a multiprocessor ready and vector ready. The Atrevido 423 is particularly well suited for applications that require massive amounts of data. The Avispado from Semidynamics is a 64-bit RISC-V Core which is a multiprocessor ready. Semidynamics also offers technologies called "Gazzillion Misses" a solution to the memory latency problem. Semidynamics has equipped its Vector Unit with a high-performance, cross-vector-core network that provides all-to-all connectivity...