Trusted AI EDA is the way out in the maze of 3nm chip design and verification

DVCON India 2023 held in Bangalore exclusively for chip design and verification was successfully concluded on 14th Sept 2023. In trend with growing interest in using AI/ML in chip design verification, significant amount of talks and discussions were focused on growing challenges in 5nm and 3nm chip design and addressing them through fast evolving AI/ML driven and assisted EDA tools. Though the generative AI is giving semi-automated solutions for maze of issues, it's getting hallucinated quite often as its fed with queries for automated responses for critical challenges, however is showing explorable way to some extent, provided the user has deep domain expertise. EDA vendors are putting significant investment in these areas and coming out with production ready AI powered latest tools to address some parts of challenges. Verification expert Sandeep Mehrotra, Vice President of Engineering, Synopsys. Started the session with his key note titled "Autonomous Verification: Are we there yet?"
Pic above: Slide on factors driving the autonomous verification Here are the highlights from his keynote: In adopting AI-based automation, EDA can follow how vehicle driving automation such as ADAS, where step-by-step increasing of automation is being followed, initially with more human i...