DAC pre-event: Tcube, designing AI chips on cloud hot at 60th Design Automation Conference
Developing AI chips on AI enabled cloud environment is now called as "Transformative Technologies Theater" or "Tcube". This is the hot topic at 60th DAC. Let's get more into it.
Like how semiconductor is becoming critical element in modern systems, electronic design automation tools are even more critical in semiconductor chip design. However talented electronics and semiconductor chip design engineer you are, your knowledge and effective use of various software elements in designing chip defines your capability. To say in short "new semiconductor chips are designed using already matured well-established semiconductor chips". So in this world of "chips by chips", human role is finding new innovative applications and markets, designing conceptual abstract level system using high-level languages, and more importantly monitoring processes, flows, and clearing bugs which software failed to identify. While digital circuits are extraordinarily faster than human being in processing giga chunks of binary data. In the past, chips were lacking in identifying a picture, a shape, an analog signal as fast and reliable as human eye and brain can read. But now chips are evolved to recognise patterns, to read shapes and to read the full picture by using vector processing, MAC, in memory computing, neural processing and such fast evolving new processing architectures. With the chips acquiring humanlike capability in sensing and reading information, the so-called artificial intelligence (AI) computing is now a reality. The massive growth of public computing resources in the form of cloud computing offers design engineers to use such services on subscription basis. These are called hyperscale cloud computers, since they get updated with all the latest computing features with the time. And the networks connecting to the cloud and to your system are growing faster and better solving the latency issues with the 6G and speedier satellite communication coming in.
So the three trends: AI capable computing elements, availability of hyper scale cloud computing resources, and extremely fast networking speeds enabling complete chip design from your desktop. These three trends to enable lot more new compounds of chip-technology. One such is, you can virtually see the physical device under-making and you perform tests on the virtual device as if you are doing on the real physical device. This is called Digital Twin technology, where you have virtual device exactly looking like physical device like a twin, and you can control it remotely. Whether you call this tech good, bad or cloudy.
This year's Design Automation Conference (DAC) event which is being held on 9th July to 13th of July at Moscone West San Franciscon, there is lot of attention on the so-called Transformative Technologies Theater or Tcube.
In this article, I'll try to give some pre-event information such as what's going to be discussed, who are present at the event, and more hot topics at 60th version of DAC. There is a session titled "The good bad and cloudy" at this year's DAC.
Shift-left: Using a concept called shift-left in chip design flow is must to tape-out chips faster and become successful first time. Shift-left is another software jargon, it simply means test your chip and chip based software application before it is physically available using cutting edge simulators and emulators, a precursor to Digital-Twin.
Open source IP: RISC V is hot topic and it is evolving fast while proprietory cores too are evolving faster with wide availability of options. There are exclusive sessions at 60th DAC tackling issues with RISC V based SoC development.
New concept called Curvy Design: There is going to be a presentation on manufacturing curvilinear features also caller "Curvy designs" which could yield better, use less power, decrease chip size. There is a presentation on this subject of "Why is Curvy Design an Opportunity Now?"
Here is list of speakers at DAC 60:
Alberto L. Sangiovanni-Vincentelli, Edgar L. and Harold H. Buttner Chair of Electrical Engineering and Computer Sciences at the University of California at Berkeley – Corsi e Ricorsi: Here We Go Again.
Heike Riel, IBM Fellow, Department Head Science & Technology, IBM – Quantum Computing Roadmap.
Walden Rhines, President and CEO, Cornami, Inc. – Taking AI to the Next Level.
Prof. Mark Horowitz, Yahoo! Founders Professor, Stanford University – Life Post Moore’s Law: The New CAD Frontier.
In addition to the Keynotes, DAC 2023 will host inspiring Visionary, SKYTalks and TechTalks.
Joe Sawicki, Executive Vice President, Integrated Circuits, Electronic Design Automation, Siemens EDA – Systems 2030 – What’s Needed to Succeed in the Next Decade of Design without Resorting to Human Cloning.
Prith Banerjee, Chief Technology Officer, Ansys – Driving Engineering Simulation and Design with AI/ML.
Lip-Bu Tan, Executive Chair of the Board, Cadence Design Systems – Advancing Precision Medicine through Generative AI-driven Drug Development.
Cecilia Metra, Professor and the Deputy President of the School of Engineering, University of Bologna – AI Hardware Reliability and Safety Challenges to Enable the Future Metaverse.
Dr. Dev Shenoy, Principal Director for Microelectronics, Department of Defense – Microelectronics Security: A Growing National Imperative.
Dr. Paul Cunningham, Senior Vice President and General Manager, Cadence Design Systems – Entering a New Era with EDA 2.0 and AI-Driven Electronic System Design.
Jean-Philippe Fricker, Founder and Chief Systems Architect, Cerebras Systems – The Cerebras CS-2: Designing an AI Accelerator Around the World’s Largest 2.6 Trillion Transistor Chip.
Edith Beigné, Research Director of AR/VR Silicon, Meta Reality Labs – Building the Metaverse: Augmented Reality Applications and Integrated Circuits Challenges.
Robert Wille, Chief Scientific Officer, Software Competence Center – Design Automation for Quantum Computing.
Ezekiel (‘Zeke’) Wheeler, Young Innovator, Ham Radio Operator (KJ7NLL) – DIY Orbital Tracking System for Space Communication: A Project to Contact the International Space Station.
Chandrasekar Vuppalapati, Microsoft – What ChatGPT and Generative AI mean for Semiconductor Design and Development.
Majid Ahadi Dolatsara, Software R&D Engineer, Keysight Technologies – Revolutionizing EDA: The Power of AI, ML, and NLP.
Complete program list of 60th DAC can be found at:
Some of the companies participating at DAC 60 2023 and the stuff they are showcasing and presenting include:
1. Imperas is at DAC 60 2023 with panels and presentations, and exhibits and live demos at its booth 2336. They are in the panel on "Delivering on RISC-V’s Promise to Give Designers Freedom to Innovate – What’s Needed?"
2. proteanTecs to exhibit and speak at DAC and part of panel “The Industry 4.0 Revolution of Semiconductor Design”
3. VLSI IP company True Circuits to introduce its powerful JSPICE simulation and design environment at DAC 60 2023 which has been used by True Circuits over the last 25 years to create complex analog and digital IP and will now be available to the public initially through a beta test. True Circuits Booth no. is 1335.
4. Ansys to present with full force at DAC 60 2023, where its CTO Prith Banerjee talk on the subject titled “Driving Engineering Simulation and Design with AI/ML,” where he will discuss how Ansys is incorporating artificial intelligence and machine learning (AI/ML) capabilities into its products. Ansys DAC Breakfast Panel titled “Driving Design Excellence: The Future of Automotive Electronics.” focuses on hot automotive chips. And lot more by Ansys:
5. Faraday to display and discuss its three product offerings: FPGA-Go-ASIC, SONOS eFlash platform for UMC’s 40nm Ulp process and its embedded FPGA (Efpga) solution.
6. Primarius Technologies to showcase its Design-Technology Co-Optimization (DTCO)-enabled EDA solutions powered by the latest generation SPICE and FastSPICE technologies at 60th Design Automation Conference.
7. PQShield, a data-secuity company which is into development of new cryptography standards where it also provides Quantum-safe cryptography on chips is exhibiting at DAC 60.
8. Weebit Nano to demo its ReRAM IP in SkyWater Technology’s S130 process, and a demonstration of neuromorphic computing based on Weebit ReRAM.
9. Ausdia has enhanced the constraints management platform with new spreadsheet-based flows and and is highlighing its timevision platform in its booth at DAC 60.
10. India based Agnisys founder Anupam Bakshi whose team provide VLSI design services such as front-end design, verification, and validation is part of the panel talk on “Tackling SoC Integration Challenges.” Their product named certified IDesignSpec Solution Suite leverages a golden executable specification to capture and centralize registers, sequences, and connectivity for Intellectual Property (IP) and System-on-a-Chip (SoC) projects.
To know more on DAC visit www.dac.com
Author: Srinivasa Reddy N