Tunga, a India Co made RISC V powered SoC handles fractions using Posit

Calligo Technologies, a Bangalore-based AI driven analytics company incubated by Semiconductor Fabless Accelerator Lab (a government of Karnataka's initiative) has come out with a RISC V based system-on-chip named TUNGA. This chip has a speciality of featuring Posit Numeric Unit (PNU). Posit Numeric Unit (PNU) consumes lesser silicon space than IEEE FPU but delivers higher accuracy, higher dynamic range and entropy per bit, making it possible to replace 64-bit floats with 32-bit Posit safely in many cases. Semiconductor Fabless Accelerator Lab (SFAL) through its eco-system has made available VLSI chip design EDA tools and silicon manufacturing to Calligo. Indian headed US headquartered UST has also invested in this project. This new chip is going to be used in accelerator boards targeting high-performance computing under make in India initiative. Calligo in its release praised our honourable Prime Minister of India, Narendra Modi who had recently said that India has no option but to be 'atmanirbhar' (self-reliant) when it comes to semiconductors and this sector has brought new possibilities for Make in India - at a post-budget webinar on 'Make in India for the World' organized by the Department for Promotion of Industry and Internal Trade. TUNGA SoC is designed keeping in view of the growing market processor chips to handle more edge-computing and cloud side datacen...