Atomic layer deposition and EUV takes chip scaling to 5nm replacing finFET with NW/NS

To take VLSI chip integration further FinFET is replaced by Nanowires with metal gate all around. The CEA Leti, imec and IBM, all are making this technology realistic. IBM is little ahead by announcing a breakthrough process to use Nano sheets to make nano wires by using extreme ultraviolet (EUV) lithography and other innovation in nano-tech. Alternate thin silicon and metal sheets are used to form laterally fabricated Silicon nano wires which are wrapped/surrounded by metal. IBM has not disclosed about the methods used to deposit atomic scale films of metal and semiconductor layers. The advanced atomic-layer epitaxial deposition processes may have been used to achieve required accuracy and also to deposit semiconductor materials like Germanium over Silicon to make the Si-Ge channel. The role of semiconductor equipment companies such as LAM Research, Applied Materials, and ASM is key in making 5nm chips.
The interesting part of the process is exploring EUV litho to etch silicon sheets into nano-wire like formation for any customised sizes whether to achieve low power consumption or higher speed. All this is done without using multiple patterning to save from using higher number of expensive photomasks. Interestingly lot of traditional semiconductor equipments may have ...