Jaswinder Ahuja: IoT and its consequences of the semiconductor chip design

A new year has dawned and with it emerge fresh new challenges for design engineering teams and for us as key ecosystem partners. The challenges we’ll face in the next 12 months will no doubt be as tough as what we conquered as an industry in 2014, but that’s why we love this industry. Let’s take a look at some areas of both challenge and opportunity in 2015. Advanced Nodes Despite forecasts of the early demise of Moore’s Law, advanced node development continues apace. Indeed, I’ve been surprised in 2014 that, given the fact that 16nm and 14nm nodes have not yet ramped to volume, several companies already are looking at 10nm readiness. And they have plans to do test chips as early as mid-2015. Waiting just off stage, of course, is 7nm. These transitions are going to test all of us as innovators. But we’ve already begun to put in place an industry structure to tackle these tough challenges. “Vertical co-optimization” has been an important innovation in advanced node enablement. Essentially, it turns a process that was a series of steps into a parallel process. While the serial process was easy to manage because each step was self-contained, it yielded sub-optimal results and could be time-consuming. In contrast, the vertical co-optimization approach offers a multitude of opportunities to see how decisions in one realm affect the other elements of the ...