VLSI/Semiconductor tech 2015: At 7nm Silicon giving way to Ge, III-IV, CNT and Graphene
In 1950s, when industry has moved from vacuum-tube diodes and triodes to solid-state diodes and transistors, electronics device researchers have selected Germanium as their semiconductor material. Early solid state diodes and bipolar junction transistors were made using Germanium material. But quickly Germanium replaced with silicon. In today's complementary metal–oxide–semiconductor (CMOS) digital integrated circuits, silicon is used near 100%. Now with the geometries of MOSFET shrinking further down the 14/10 nm, the performance of silicon as MOSFET channel material is questionable, with limitations in frequency of switching, and even the switch itself is erroneously operating. Well the future can be called post-silicon era, where the industry is moving from microelectronics to nanoelectronics/photonics.
IBM said in one of its release "Their (latest Si chips) increasingly small dimensions, now reaching the nanoscale, will prohibit any gains in performance due to the nature of Silicon and the laws of physics. Within a few more generations, classical scaling and shrinkage will no longer yield the sizable benefits of lower power, lower cost and higher speed processors that the industry has become accustomed to."
In the immediate future, the transition into <7nm is basically moving into non-Silicon CMOS switching, EUV lithography and increased on-chip photonics, a combination of control of electrons and photon flow in single integrated device. The 3D growth of structures will be more prominent.
Germanium and Indium Gallium Arsenide (InGaAs) and other such high electron mobility materials are been successfully explored either to replace Silicon or to work along with Silicon. The advantages of a Germanium and other compound semiconductor material over Silicon at deeper nodes includes: Germanium and compound semiconductor materials offer higher electron and hole mobility and density allowing switching on and off the CMOS transistor faster while continuing to shrink the size down to 7 nm.
Both three-dimensional FinFET and trench like process and as well as two-dimensional traditional process are explored by semiconductor researchers. MOSFET channels of compound semiconductor material or Germanium are created over the fin like structures of Silicon (which are called finFET) or in the nm thin trenches (quantum well FET). One of concept is called quantum well-high electron mobility transistors (QW-HEMT). A CMOS with p channel MOS-FET using Germanium or InGaSb and N-channel MOS-FET using InGaAs (Indium Gallium Arsenide) has emerged as one of the solution.
IBM claims its researchers have demonstrated the world’s highest transconductance on a self-aligned III-V channel metal-oxide semiconductor (MOS) field-effect transistors (FETs) device structure that is compatible with CMOS scaling at 7nm and beyond.
In year 2013 itself, Nanotech researcher IMEC has successfully applied fin replacement process to fabricate both III-V FinFET as N-channel and strained Ge to form p-channel FinFETs.
Let's look the basic difference between Silicon vs Germanium, comparing both benefits and drawbacks of Silicon and Germanium:
Before praising Germanium and compound semiconductor materials, Its good to know why Silicon was using all these years so extensively. Silicon is the most commercially and also technically advantageous semiconductor material compared to other semiconductor materials.
Silicon is the most abundantly available semiconductor material on Earth. It is basically the sand what we see around us in the form of Silicon oxide. Silicon, which basically in crystalline form can withstand high-temperature. Silicon conducts heat faster. Even by the physical properties Silicon is stronger and harder like many other metals such as Iron. Please see the table below of comparison of Silicon with Germanium. The reverse breakdown of Silicon diode is higher than Germanium and lesser chances of avalanche breakdown compared to other semiconductor materials. In bipolar junction transistors, the variation of collector cut-off current with temperature is lesser in Silicon compared to Germanium. Germanium crystal requires annealing in case of implantation process is used. Well, huge number of advantages of Silicon over Germanium.
Pic above: Comparison table of Silicon, Germanium and Indium Gallium Arsenide.
Pic above: Junction diode characteristics of Ge and Si.
Pic above: Comparison of collector current against base-emitter voltage for Germanium and Silicon
We should also talk about the weaknesses the Silicon has over other semiconductor material. Silicon-based transistors are not fast in switching compared to many other semiconductor materials. It is very difficult to generate photons/light out of Silicon material. The electron mobility inside Silicon material is less compared to many other compound semiconductor materials including Germanium. The forward voltage drop of a Silicon diode is higher compared to Germanium diode. At deeper nodes such as 7 nm, these things started mattering, where Silicon failing to offer reliable switch which can work at higher frequencies as well as generate light for high-frequency communication between different functional units inside a chip.
So, is chips with non-Silicon semiconductor material going to be expensive? Mostly yes for some time, and that is the challenge for the chip industry to keep the cost of chips lower while increasing the performance.
Below we present you some of the latest development in integrated circuit device fabrication post 10/14nm.
1. Ge and InGaAs CMOS
The P channel Germanium MOSFET can be built similar to Silicon PMOS, without much process changes. See the figure below. But building NMOS from Ge is found to be tough. So many researchers have built NMOS using compound semiconductor material InGaAs, which requires a further complex process compared to Silicon NMOS.
The Hetero junction N channel MOSFET uses a concept called quantum well MOSFET, and the process is Silicon foundry friendly, which uses MOCVD equipments.
To achieve higher electrostatic integrity, barrier layers of Indium Aluminium Arsenide and Indium Phosphide are used between Indium Gallium Arsenide channel and base Silicon substrate.
The challenge here is to have a electrical performance in sync with Silicon type CMOS where, operating voltages, (0.5V) on-current and off-current matches.
The Indium Gallium Arsenide channel is separated with gate using Al2O3 (Aluminium Oxide) and Hafnium Oxide gate stack. In some cases Zirconium Oxide is used instead of Hafnium Oxide.
2. All Ge CMOS:
The poor hole mobility of InGaAs and the epitaxial InGaAs nMOSFET on Si are prone to defects and high leakage current, which makes it very challenging to achieve InGaAs-nMOS/Ge-pMOS CMOS below 14 nm CMOS. So all-Ge CMOS logic is touted as best. Fabricating the P channel MOS-FET out of Germanium is easier, but N channel MOS-FET out of Germanium faces some problems. Ge N channel MOS-FET is prone to large equivalent-oxide-thickness (EOT) and fast mobility degradation with increasing Eeff because of surface Fermi-level pinning to valance band and poor high-K/Ge interface and low dopant activation.
IMEC researchers have used novel laser annealing and proper gate stack, small EOT of 0.95 nm, small sub-threshold swing of 106 mV/dec, and 40% better high-field mobility than universal SiO2/Si data were achieved in Ge nMOSFET.
Imec says "Such all-Ge CMOS has irreplaceable merits of much simpler process, lower cost, and potentially higher yield than the InGaAs-nMOS/Ge-pMOS CMOS platform."
There are cases InSb suggested as replacement for Ge for P MOS FET, but the industry is not so progressing in this area.
In another case of all-Germanium-based CMOS transistor, researchers at Purdue University have made all Germanium CMOS device. The difficulty of making N type contact with low electrical resistance in Germanium-based NMOS devices, is overcome by Purdue researchers. They have dope Germanium with impurities to reduce the electrical resistance and they have removed top layer of Germanium, which provides a good contact.
Pic Above: All Ge CMOS
To give you some more latest information on other options in nano devices:
3. CNT and RRAM
If you're wondering what about Carbon Nano Ttubes (CNT), and most talked about material Graphene and any such newly invented materials, they are being immensely explored by researchers to replace Silicon.
Researchers are exploring to use CNTs in the deep node chip manufacturing. IBM has demonstrated CMOS NAND gates using 50 nm gate length carbon nanotube transistors. Carbon nanotubes are single atomic sheets rolled into a tube shape. Stanford University in US has done commendable job in this area. Temperature stability is big issue in CNTs. Read the article "3D CNT logic and RRAM memory device to outperform today's silicon chips" to know more on Stanford's Researcher's achievement.
The most talked about material Graphene is excellent conductor of heat and electricity, and it is also strong and flexible. Electron mobility in graphene is 10X faster than Silicon. Graphene's too much conductance is becoming difficult to handle, but over time it may be the blessing. Most of the researchers see higher opportunity for Graphene in Tera Hertz applications . Compatibility of Graphene with other semiconductor industry materials is a issue.
IBM has already demonstrated graphene based integrated circuit receiver front end for wireless communications. The circuit consisted of a 2-stage amplifier and a down converter operating at 4.3 GHz.
Graphene like atomic thin material called Germanane is also explored. Germanane is made by bonding hydrogen to Germanium in the z direction of each atom. Germanane offers 10 times higher electron mobility compared to Silicon and five times more than Germanium. Germanane is said to be very less reactive when exposed to air and water.
Ohio State University researchers, who have pioneered in developing Germanane suggest Germanane suits well for Silicon-based manufacturing process compared to Graphene.
6. EUV and other advancement:
Well above all is about materials, another important stumbling block when industry moved to 7 nm is printing of patterns using extreme ultraviolet lithography (EUV technique). There is significant amount of progress in this area in 2014.
At the SPIE Photomask Technology 2014 conference held on 16-18 September 2014, keynote speaker Martin van den Brink, President and CTO of ASML, said that extreme ultraviolet (EUV) source technology is reaching performance levels that enable introduction into production lines in select cases at the 10 nm node, and that progress is such that it should soon be ready for full-scale introduction at the 7 nm node.
The manufacturing of pure Ge CMOS or compound semiconductor CMOS devices is driven by technical advances in the atomic-scale synthesis of oxide heterostructures. Interface superconductivity, magneto-electric coupling, and the quantum Hall effect in oxide heterostructures are said to be the opportunities in this rapidly emerging field. Atomic Layer Deposition (ALD) fabrication of non-Silicon MOSFETs over Silicon base is explored at sub-10 nm nodes.
The final winner and the market:
Though which technology comes out as winner is not clear, but what is clear is nano device fabrication is hitting a cross-road junction. There are lot of forces both geo-political, market and technology working to take control of the next gen chip fabrication. Its fight for controlling nanodevice economics to dominate the technology world. The idea is not only to offer the best technology in some case, or the cheap tech in other case, but both are aimed at how to finish the competitor and leverage their present strength and infrastructure. The partnerships among competitors keep changing based the changing common-factor. What the trend seen is, the number of players are increasing. Asia is on the path of having highest number of semiconductor fabs in the world. China has lots of fabs and more is on the plan, Brazil has one semiconductor fab and is expanding, and India soon going to have two fabs. In a news report from Sputnik News, Alexander Yakunin, CEO of Russian United Instrument Corporation said "By 2020, 95 percent of key components of our [military] technology will be domestically produced". India's 'Make In India' move is also aimed at local production of electronics components. Amid all these, fabless business model is still a winner.
If you are interested to know the amount of semiconductor materials available on earth. Below image will help you.
Well, we are still not taking about another fast emerging area of organic semiconductor material such as Pentacene in this article, that field looks to be even more cutting edge/bleeding edge technology in nano devices, we will write on that in a separate article.
ps: This new version is edited to correct some grammer/spell errrors and also some small additions.
Author: Srinivasa Reddy N