Electronics Engineering Herald                 
Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New


  Date: 28/10/2014

A start up turns semiconductor into a gel for SoC VLSI design engineers

If you have a ALU or registers or any such processor elements in a rigid fixed silicon, you are forced to use set of software and hardware tools designed for such rigid silicon. The advantage of FPGA is clearly the way out of rigid logic circuit and pattern, but still FPGA is not reprogrammable silicon in real time. What if processor core itself is virtual and its elements created in real time and wired through a code, that looks to be the idea driving the new semiconductor startup Soft Machines.

The processor core by Soft Machines is called VISC. Compare to CISC (x86) and RISC (ARM processor cores), VISC offers virtual cores/threads. The virtual processor cores scales not only on software but also the physical silicon, so it is mostly a kind of advance programmable silicon more advanced than FPGA. See the VISC block diagram below for better understanding:

processor virtual

Close to ARM's big little concept, VISC allocates resources across threads based on the app needs but it looks to be more flexible than the ARM's processor cores computing handling. VISC cores are not limited by physical limitation of cores. VISC also uses virtual hardware threads instead of software threads for multitasking. This all means there is some amount of programmable hardware, but it is only a guess, Soft Machines has not disclosed any details on the micro-architecture of its VISC the processor cores.

The virtual threads are formed after fetching the instruction code and the best low power mode is selected by using optimized processing resources. The power consumption is increased linearly with the increase in computation. Soft Machines claims VISC offers 2.2x performance improvement over the present processor cores. So the power consumption is down by 1/3 in comparison to present best processor SoC chips. VISC architecture executes 3 to 4 more instructions in single clock cycle (IPC).
The proof of concept prototype is already available. The hardware board supports LINUX OS.

The super specialty of VISC is it reads the program/code written in ARM X86 as guest code and converts it to native VISC code. That means the systems designed using VISC can run Windows as well as any other OS apps.

On the processor physical size scalability, VISC scales from sand grain size processor for energy harvesting IoT to stamp sized processor chips for servers. The name virtual gives all the power.

If all that claimed by this company is true, SoC processor world to undergo another paradigm shift, a kind of disruptive tech. Though silicon is solid by physics, this new startup is trying to make the silicon more of a gel for a VLSI programmer so that it can be configured as they wish.

Soft Machines was operating in stealth mode from 2006 and is founded by Mahesh Lingareddy, an alumni of Andhra University, Kakinada, AP, India and Mohammad Abdallah, an alumni of University of Jordan, Jordan.
Interesting thing is, in today's world of VC showing less interest in semiconductor start-ups, Soft Machines received a funding of US$ 125 million and is employing 250 people in US, India and Russia. The reason is Soft Machines business model can challenge Intel and ARM in processor market. To give you an idea of how strong is the leadership, Sanjay Jha, chief executive officer of GlobalFoundries, is the chairman of Soft Machines. On the patent front, company has filed more than 75 patents.

To give you another nugget of news on processor cores, the new BA20 PipelineZero 32-bit Embedded Processor IP Core from Cast provides efficiency comparable to the Cortex-M4, but with a small size similar to the Cortex-M0+, another aspect of innovation in processor cores.
Author: Srinivasa Reddy N
Header ad

Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
©2012 Electronics Engineering Herald