Silab designs its 28nm PHY IPs faster using Mentor's EDA tools

Date: 09/06/2013
Mentor Graphics says SilabTech Pvt. Ltd. has achieved first silicon success for their latest 28nm high-speed, mixed-signal PHY IPs for PCI Express, SATA, MIPI, M-PHY and USB 3.0 in advance of the planned schedule. SilabTech used Mentor Graphics Pyxis, Eldo, and Calibre tools for custom layout, extraction, simulation, physical verification, and DFM analysis. The companies are also working in the post-silicon space to help characterize test chips, and to create a fully-compliant protocol certification platform using Mentor FPGA and PCB tools.

SilabTech is a mixed-signal IP company specializing in analog-intensive designs that connect the digital world with the real world for multiple applications.

“With such a wide range of IC applications, SilabTech needs a tool flow that is both highly functional and supported by the world’s leading fabs,” said Sujoy Chakravarty, founder and CEO at SilabTech. “The advanced features of the Pyxis custom layout suite allow us to achieve best-in-class power and area quality of results, while verifying our designs with the Calibre Platform helps ensure that we will not have manufacturing surprises that could threaten our very aggressive design schedules.”

“Mentor Graphics is focused on our customers’ success,” said Walden Rhines, chairman and chief executive officer of Mentor Graphics. “So along with EDA software, we provide expertise that starts during early technology development with the world’s leading foundries. We can help our customers overcome technical challenges and help ensure they achieve their overall business goals.”