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  Date:24th May 2012

Performance Analysis Kit from Carbon Design Systems and Cadence for IP optimisation

Carbon Design Systems Inc and Cadence Design Systems have announced availability of a Carbon Performance Analysis Kit (CPAK) to accelerate the intellectual property (IP) benchmark process.
The CPAK incorporates a Cadence double data rate (DDR3) memory controller together with an ARM Cortex-A9 MPCore processor, and industry-standard benchmarks, such as those from EEMBC.
The Carbon/Cadence offering is the latest addition to the library of Carbon Performance Analysis Kits available from Carbon's IP Exchange web portal. This platform features an ARM Cortex-A9 processor and a Cadence DDR3 memory controller, along with configurable models for the interconnect fabric, DDR3 memory and memory PHY.

In addition, multiple configurable traffic generators are included as producers and consumers to model additional bus traffic. Included in the system is a software package that includes, among other tests, the CoreMark benchmark from EEMBC. The CPAK executes in Carbon's SoCDesigner Plus virtual prototype environment that delivers a rich suite of analysis and visualization tools.

"Optimization of the processor to memory datapath plays a key role in the development of many leading-edge SoCs," remarked Rick Lucier, president and chief executive officer at Carbon. "By partnering with Cadence to deploy this CPAK, we are enabling engineers to be more productive by benchmarking the same day they download the package from Carbon IP Exchange."
"Being able to quickly demonstrate the value and ease of use of our memory controller models is a great aid to our customers," stated Vishal Kapoor, vice president of marketing, SoC Realization Group at Cadence. "This Performance Analysis Kit bypasses any traditional setup issues and enables engineers to be productive immediately."

"The Carbon/Cadence Performance Analysis Kit executing CoreMark highlights the important role that industry standard benchmarks can play in the IP selection process," added Markus Levy, president of EEMBC.

"ARM power-efficient technology is at the heart of many products, ranging from embedded microcontroller applications to servers, network infrastructure and smart connected devices," commented Joe Convey, director of design enablement, ARM. "Reference implementations, such as the Carbon/Cadence Performance Analysis Kit, are important tools that allow ARM Partners to innovate more easily by quickly understanding capabilities of the Cortex-A9 processor."

The Carbon/Cadence CPAK is available now from Carbon's IP Exchange web portal: www.carbonipexchange.com. The ported CoreMark benchmarking software is available from www.coremark.org.

Author: Srinivasa Reddy N
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