Date: 25th Aug 2010
Sidense granted anti-fuse memory cell
patent by USPTO
Developer of Logic Non-Volatile Memory (LNVM) IP cores,
Sidense has announced that the United States Patent and
Trademark Office (USPTO) has recently granted the Company
Patent Number 7,755,162, "Anti-fuse Memory Cell."
This new patent is on Sidense' 1T-Fuse memory technology.
Sidense says that its 1T-Fuse Split-Channel bit cell is
a secure, reliable and cost-effective non-volatile, one-time
programmable (OTP) memory IP products, comprising the SiPROM,
SLP and ULP families. Sidense also says that the '162 is
one of five U.S. patents covering various aspects of the
Split-Channel 1T bit-cell technology and its usage in OTP
memory products, adding to 18 patents worldwide, granted
to Sidense.
"This new patent on our anti-fuse memory technology
reflects our constant strive to innovate and improve performance
of our high-density OTP IP for the advanced CMOS processes,"
said Wlodek Kurjanowicz, Sidense Founder and CTO. "Patents
are very important to Sidense and reinforce the value and
uniqueness of Sidense memory IP to our customers."
The new USPTO Certificate comes soon after the USPTO's
recent grant of a request to re-examine Sidense's '855 Patent
claims.
Wlodek Kurjanowicz said, "Sidense welcomes the re-examination
with enthusiasm. It provides yet another opportunity to
reaffirm the differences between Sidense's state-of-the-art
"split-channel" cell technology and prior attempts
to build "1T eNVM" through various unworkable
process modifications. We are quite confident that '855
claims will emerge strengthened and reinforced, as Sidense's
1T technology becomes increasingly recognized as the industry-standard
OTP."
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