Lattice upgrades its Radiant Design Software with functional safety features
Date: 31/03/2024
Lattice Semiconductor has introduced the latest version of its Radiant design software, now integrated with Synopsys Synplify FPGA synthesis tool with TMR. This update aims to provide designers in the Industrial, Automotive, and Avionics markets with enhanced functional safety and reliability capabilities for developing FPGA-based applications.
The integration of Lattice Radiant with Synopsys Synplify TMR facilitates the development of FPGA designs with robust functional safety protections and high reliability, meeting industry standards such as DO-254, IEC 61508, and ISO 26262.
The automation provided by Synopsys Synplify TMR addresses soft errors like Single Event Upsets, ensuring dependable operation in safety-critical applications.
The latest Radiant release offers a Safety Critical Block-Based Design Flow, Interactive Tcl Based Static Timing Analysis for faster timing closure, and Multi-bit error injection for Soft Error testing.
The collaboration between Lattice and Synopsys aims to streamline FPGA design processes, providing designers with efficient and reliable tools to meet safety-critical application requirements in various markets.
