GOWIN Semiconductor expands its Arora V high-performance FPGA family

GOWIN Semiconductor has braoadened its Arora V high-performance FPGA family. The expanded line features cutting-edge 22nm SRAM technology, 12.5Gbps high-speed SerDes interfaces, PCIe hardcore, MIPI hardcore D-phy and C-phy support, RISC-V microprocessor, and DDR3 interfaces. The new devices include 15K, 45K, 60K, and 75K LUT devices. GOWIN said this new Arora V family along with complementing the previous Arora family also offers a significant performance boost with lower power consumption. Specifically, the Arora V devices exhibit 30% higher performance and a remarkable 60% reduction in power consumption compared to the Arora GW2A family. Arora-V programming configuration provides designers with a wide array of options including JTAG, SSPI, MSPI, CPU, and the ability to directly program external SPI Flash in JTAG or SSPI Mode. In addition, it allows for indirect programming of external Flash in other modes using a soft-core IP bridge and supports background upgrades, bitstream file encryption, and security bit settings. Arora V further distinguishes itself by delivering exceptional Single Event Upset (SEU) resiliency compared to competitors. GOWIN has adopted an innovative approach by designing custom SRAM cells, significantly reducing soft error rate effects. To make the handling of SEU-related matters more accessible, GOWIN provides a "SEU Handler" wrapper IP, which...