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Andes Technology launches new RISC V cores D23 and N225 for IoT

Date: 25/10/2023
RISC V based chip IP specialist Andes Technology unveiled the new AndesCore D23 and N225 RISC-V processors. Specifically designed to cater to the dynamic needs of the Internet of Things (IoT) and embedded systems, these cores showcase their commitment to cutting-edge technology for IoT and embedded systems.

The D23 and N225 cores prioritize compactness, performance efficiency, low power consumption, flexibility, and security. They meet the demands of a rapidly evolving market while minimizing power usage and ensuring robust security for IoT and embedded chip and device manufacturers.

In February 2019, Andes introduced the N22, a 2-stage pipeline AndesCore that implements the RV32I/EMAC ISA. This processor is specifically designed for deeply embedded processing and boasts a performance of 3.95 Coremark/MHz and 1.8 DMIPS/MHz. Building upon the success of the N22, Andes has now released the D23 and N225, which feature a new microarchitecture and incorporate the latest RISC-V extensions. These revamped designs offer improved performance, reduced code size, and enhanced security support. For customers seeking to upgrade their N22 designs or embark on a new design project, the D23 and N225 provide an excellent migration path.

Common Key Features of AndesCore D23 and N225:

Latest RISC-V Extensions Support: The N225 implements the RV32 IMACBZce non-privileged extensions as well as Machine/User modes and Enhanced Physical Memory Protection (ePMP). The D23 additionally supports the FDKP extensions (Single/Double-Precision Floating-Point, Scalar Crypto and Packed SIMD/DSP draft), and CMO (Cache Management Operations) extension. The D23 is also incorporated with Supervisor mode and its associated PMP (sPMP) for higher security.

Compact Size: Both cores feature a highly compact design with a 3-stage pipeline, primarily supporting single instruction issues with some dual-issue capability. This makes them exceptionally well-suited for space- and memory-constrained IoT and embedded applications, including wearables, sensors, and smart home devices.

High Performance: Both cores achieve industry-leading performance in their class, boasting outstanding benchmark scores such as 4.55 (D23) and 4.4 (N225) Coremark/MHz, and 2.08 (D23) and 1.92 (N225) DMIPS/MHz, respectively. They are capable of operating at high frequencies across various technology nodes such as near 800 MHz at 28nm, providing the necessary computing power for edge IoT devices with ever-increasing performance and feature demands.

Power Management: Both cores support advanced power management technologies such as PowerBrake Wait-For-Interrupt (WFI) and Wait-For-Event (WFE), ensuring prolonged battery life for many types of untethered IoT devices.

Small Code Size: The N22 already offers industry-leading code size with Andes CoDense technology. With the addition of the new RISC-V Zce code size reduction extension, the D23 and N225 further reduce 4.4% code size for the Embench-IoT benchmark, compared to the N22. This provides additional memory cost-saving for Andes customers.

Flexibility: Both cores offer extensive configurability, including optimized multipliers for performance or area, optional static or dynamic branch prediction, various combinations of privilege modes, instruction and data Local Memories with sizes from 1 KB to 512 MB, and 2-wire or 4-wire JTAG debug interface. Designers can tailor these features to address their specific application requirements.

Ease of SoC Integration: To simplify integration into System-on-Chip (SoC) designs, both cores support either Core-Local Interrupt Controller (CLIC) for the single-CPU SoC or Platform-level Interrupt Controller (PLIC) for multiple-CPU SoC, rich options for AMBA interfaces, private machine timers or platform machine timers, and instruction trace interfaces.

In addition to the above-mentioned shared features and the latest RISC-V extensions, the D23 core offers enhanced functionalities, such as built-in instruction and data caches, ECC soft error protection for cache and local memories, and seamless integration with the ACE (Andes Custom Extension) for custom instructions in Domain-Specific Acceleration (DSA). Furthermore, it has a roadmap to incorporate a functional safety derivative. These extended capabilities broaden the scope of the D23, enabling it to cater to a diverse array of segments within the automotive and industrial control sectors.

Charlie Su, President and CTO of Andes Technology, expressed his enthusiasm for the release of these cores, stating, “The D23 and N225 mark a significant milestone in our commitment to providing innovative solutions for the IoT and embedded segments. With their compact design, power efficiency, and robust security features, these cores are poised to set new industry standards. We believe they will empower designers and developers to create cutting-edge products that can thrive in the fast-paced world of IoT.”


For more information visit: www.andestech.com/en/products-solutions/andescore-processors/

News Source: Andes Tech