Silicon IP cores optimized for metaverse and other AR/VR glasses
If you are cutting edge semiconductor design engineer and developing chips for an extreme low power consuming wearable Metaverse Extended Reality (XR) integrated personal devices. Then you can speed up such development by using readily available Silicon IP cores from Belgium based easics NV.
easics is offering IP solution named nearAI for battery-powered extended reality devices. These PPA optimized digital semiconductor IP cores deliver low-power, low latency, and low Silicon area, what easics calls as L3 optimiser technology. These digital IP cores are optimised to readily integrate into wide range of complex semiconductor ICs such as ASICs, ASSPs and system on chips.
These IPs enable development of XR devices with a response time matching human senses, where they digitally process the signals such as video from the camera and audio from microphones with very low latency using DSPs and image sensor silicon. easics says it is like instant visual and aural feedback to the user.
Most of the market researchers forecast, by year 2026 tens of millions of metaverse like augmented reality and virtual reality integrated wearable personal devices to be sold in the global market. These devices to integrate a lot of edge AI to process data from sensors and add intelligency at every level.
In this extremely complex technology and mostly un-navigated areas of product developme...
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