2.5 D FPGA and HBM solution, a 14x speed improvement over DDR4 DRAM DIMM

An FPGA with high bandwidth memory (HBM) is created for the demonstration purpose by eSilicon, Northwest Logic and SK Hynix. The demonstration device uses FPGA with Northwest Logic’s HBM Controller Core and FPGA-based HBM PHY and SK Hynix HBM devices. The FPGA and HBM are packaged on a silicon interposer, basically a 2.5D semiconductor technology. HBM is a stacked memory array connected to an ASIC via a silicon/organic interposer. First-generation HBM feature eight channels of 128-bit data running at one Gbit/s/pin for a total system throughput of 128 Gbytes/s. Second-generation HBM devices double the throughput. HBM offers a 14 times higher throughput compared to a DDR4 DIMM running at 2,600 Mbits/pin. Along with the speed and power advantage, HBM also said to offer cost advantages over competing technologies. “HBM and system-in-package technology hold great promise to break the power and performance bottlenecks designers are currently facing with regard to memory subsystems,” said Bill Isaacson, senior director, product marketing at eSilicon. “This joint effort with Northwest Logic and SK Hynix validates that HBM is ready to enter mainstream use.” "Northwest Logic’s HBM Controller Core supports both Gen 2 (2 Gbit/s/pin) and Gen 1 (1 Gbit/s/pin). The core supports a range of user interfaces and operational modes include Gen 2 pseudo-channel support. As part of this ...