Low cost Xilinx FPGA-based MIPI interface IP for embedded systems

To address the growing need of high definition video interface in embedded systems, Xilinx and Northwest Logic and Xylon have together made available a low cost Xilinx FPGA-based MIPI interface IP for connecting video displays and cameras to processing hardware platform. Image sensors and the ASSPs featuring MIPI Display Serial Interface (DSI) and Camera Serial Interface 2 (CSI-2) can now be connected to Xilinx' FPGA chips in applications involving 4K2K video interface such as advanced real-time analytics and immersive display applications. Northwest Logic provides a full range of DSI (Host and Peripheral) and CSI-2 (Tx & Rx) Controller Cores. These cores fully support 1-4 lane and 8 lane (dual 4 lane) MIPI operation. The cores are delivered fully integrated with the PHY logic to implement Xilinx's low cost MIPI Interface technique. "The Xilinx low cost MIPI Interface approach will enable a whole new range of FPGA-based MIPI products. The Northwest Logic MIPI cores that support this technique are fully hardware validated and released," said Brian Daellenbach, president at Northwest Logic. Xylon provides a broad range of video processing IP Cores. Xylon has taken a Xilinx FPGA Mezzanine Card (FMC), which implements the low cost MIPI Interface approach, Northwest Logic's CSI-2 and DSI cores and its own cores running on an off-the-shelf Zynq All Programmable SoC ev...