3D chip fab: Detecting defects in TSVs

Rudolph Technologies announced the availability of its new SONUS Technology, designed for measuring thick films and film stacks used in copper pillar bumps and for detecting defects, such as voids, in through silicon vias (TSVs). SONUS Technology is a non-contact, non-destructive acoustic metrology and defect detection technique that is designed to be of higher resolution, faster, and less costly than alternative techniques. Rudolph has collaborated with TEL NEXX specifically to develop pillar bump and TSV plating process control based on SONUS Technology. “SONUS Technology meets a critical need for measuring and inspecting the structures used to connect chips to each other and to the outside world,” states Tim Kryman, Rudolph’s director of metrology product management. “Copper pillar bumps and TSVs are critical interconnect technologies enabling 2.5D and 3D packaging. Plating process control for copper pillar bumping is directly related to the mechanical integrity of the interconnect and final device performance. Likewise, the quality of the TSV fill is critical to the electrical performance of stacked devices. Rudolph’s patented SONUS Technology offers the unique ability to measure individual films and film stacks to thicknesses of 100µm and detect voids as small as 0.5µm in TSVs with aspect ratios of 10:1 or greater.” Arthur Keigler, chief technology officer of TEL...