Electronics Engineering Herald                 
Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
Processor / MCU / DSP
Logic and Interface
Power-supply and Industrial ICs
Automotive ICs
Cellphone ICs
Consumer ICs
Computer ICs
Communication ICs (Data & Analog)
RF / Microwave
Subsystems / Boards
Reference Design
Software / Development kits
Test and Measurement

New Products

  Date: 23/04/2014

Small LP OpenVG Vector Graphics IP Core from CAST

CAST has announced ThinkVG Vector GPU IP Core with full support of the OpenVG 1.1 vector graphics API. CAST claims this is the smallest core with 160K gates (excluding memories) and that it is also the most energy efficient. This makes ThinkVG ideal for enabling scalable vector graphics formats (e.g., vector fonts, SVG images, PDF files, or Flash animations) or sophisticated user interfaces in low-power devices such as smart watches, handhelds, feature phones, e-readers, automotive displays, and GPS navigators, says CAST.

The IP core is in production and real-world-proven with CAST's customer is already shipping high-volume consumer devices embedding the ThinkVG GPU.

Think Silicon designed ThinkVG is built around VShader, a single-instruction, multiple-data (SIMD) shader processor, with multiple floating-point units and internal instruction and data caches. The core includes graphics accelerators that handle rasterizing and texture mapping, and a small VLIW (very long instruction word) blending unit.

Power savings come from the reduced idle power used by the small silicon area plus a proprietary frame buffer compression technique that minimizes external memory accesses, advanced power management features, and dynamic voltage and frequency scaling (DVFS).

“With ThinkVG we’re bridging the gap between power-hungry GPUs and non-programmable hardwired graphics accelerators, providing a very compact and low-power solution for embedded devices that require fast vector graphics rendering,” said George Sidiropoulos, managing director of Think Silicon. “We focused on designing a Unified Shading Architecture assisted by a balanced hardware pipeline that achieves the highest throughput-per-gate ratio by means of high component reuse.”

The ThinkVG OpenVG IP Core is available now in RTL source code, with the software library and API package, drivers, a compiler, and other development aids.

Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
©2010 Electronics Engineering Herald