40 GFLOPs vector floating point DSP for wireless communication

To design a powerful ultra modern wireless base station, you need a high performance computer comparable to a old-style supercomputers to handle multiple types of data received from multiple air interface standards such as LTE, 3G and Wi-Fi. The trend is clearly software defined radio/network, which really requires high performance computing. The concept once which was popular in supercomputers called vector processing is now making a comeback in communication infrastructure equipment design. The gigaflop performance has become a necessity. There are two popular processing concepts to process multiple data in single instruction. They are Single Instruction Multiple Data (SIMD) and Vector Floating Point (VFP). SIMD is extensively used where in single instruction same operation carried on multiple data in parallel. Whereas in VFP, there is one operation on one set of inputs and returns one output. VFP speeds up the floating point calculation but is said to process sequentially. By noticing the importance of vector floating point architecture in wireless base stations, DSP IP core vendor Ceva has come out with what it claims as market's first vector floating point DSP. The CEVA-XC4500 features baseband-dedicated instruction set architecture (ISA), IEEE-compliant floating point support on full vector elements delivering up to 40 GFLOPs performance, comprehensive multi...