On-chip JESD204B ADC-FPGA signal integrity check tool from ADI

Analog Devices has released an FPGA-based reference design with software and HDL code for verification of high-speed JESD204B interfaced ADC to FPGA signal integrity. JESD204B is the high-speed serial interface standard by JEDEC for connecting high-speed ADC to chips such as FPGAs and any such high performance ASICs with ADC inputs. The JESD204B Xilinx Transceiver Debug Tool from Analog Devices supports the 312.5 Mbps to 12.5 Gbps JESD204B data converter-to-FPGA serial data interface and Xilinx's 28nm latest 7 series FPGAs and ARM Cortex processor integrated Zynq-7000 All Programmable SoCs. It is available for free to users of ADI's converters and provides an on-chip, 2-D statistical eyescan that helps designers of radar arrays, software-defined radio and other high-speed systems more quickly verify the signal integrity of JESD204B data converter-to-FPGA using gigabit transceivers. “The Analog Devices JESD204B Xilinx Transceiver Debug Tool provides on-chip eyescanning that augments the test and measurement process by statistically determining signal integrity inside the FPGA,” said Revathi Narayanan, High Speed I/O product manager, Xilinx. “Where other techniques probe the outside of the FPGA package and acquire the signal before it’s been processed by Xilinx’s automatic gain control and equalizer blocks, ADI’s approach yields a more accurate result by utilizing the Xili...