Reconfigurable radio IC for phones in 28nm unveiled at VLSI circuits Symposium

imec and Renesas Electronics have showcased multi-standard radio frequency (RF) receiver IC made in 28nm CMOS technology At this week’s VLSI circuits Symposium in Kyoto (Japan) (June 12-14, 2013). Both also announced 28nm CMOS analog-to-digital converter (ADC) targeting wide-bandwidth standards such as LTE-advanced and next-generation WiFi.

Imec has done good amount of work in the area of configurable radio transceivers for broadband communication standards including emerging cellular and connectivity standards such as LTE advanced and next-generation WiFi.

The SDR 28nm radio receiver operates from 400MHz up to 6GHz and supporting reconfigurable RF channel bandwidths up to 100MHz. The RF receiver operates at a low standard supply of 0.9V, while maintaining +5dBm of out-of-band IIP3 and tolerating 0dBm blockers. With noise figures down to 1.8dB, the chip occupies an active area of 0.6mm2, and consumes less than 40mW of power.

28nm A/D converter is a 410MS/s dynamic 11bit pipelined SAR ADC achieving peak Signal-to-Noise Distortion Ratio (SNDR) of 59.8dB at 410MS/s with a power consumption of 2 mW. ADC offers an on-chip calibration engine, occupies an active area of 0.11mm2.

Imec targets designs such as these for high-volume consumer devices where they got to work under different wireless standards. The research is to focus on high-level of integration, reconfigurability and low power.