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  Date: 21/04/2013

Arasan launches IPs for SD 4.1 devices

Arasan Chip Systems has announced SD 4.1 IPs for development of SD 4.1 devices with the UHS-II physical layer interface. The SD 4.1 specification calls out the maximum performance of 1.56 Gbps at UHS-II full duplex mode per lane or half duplex UHS-II at 3.16 Gbps.

Arasan explains "In real applications, due to the system overhead and different SD 4.1 device controller designs, the actual measured performance can vary dramatically from system to system. With the newly introduced ADMA 3, the OS driver is now able to issue multiple read or multiple write commands at once, without having to wait for the SD controller to complete one command at a time. Once the SD host controller has collected multiple commands, it will then manage and complete them without intervention from the host software drive. Thus, the UHS-II 1.56 Gbps interface can be more effectively utilized and maximize the system throughput. This feature can be very useful when running multithreaded applications where multiple applications are constantly updating their status or swapping their contents by writing or reading small chunk of data to or from the memory card."

The IP from Arasan includes SD 4.1 link layer controller IP, UHS-II PHY in advanced process technologies, verification IP with robust test suite, FGPA validation and development platform, and software stack in source code. Arasan says the link layer controller IP is designed with the most interoperability in place, based on Arasanís extensive experience in working with many SD host and SD device companies. Arasan has conducted several interoperability tests with different products in the market. Developed in advanced, 40nm and below process nodes, the UHS-II PHY is designed for higher signal integrity and lower power consumption compared to competition, claims Arasan. Arasan says it has optimized it Linux based SD software driver and tested its performance by running the Linux storage device benchmark; the benchmark results demonstrated the software driver achieving more than 90% bandwidth efficiency to squeeze out every bit of performance improvement.

Incorporating Arasanís SD 4.1 IP on a FPGA board with the software stack on a Linux based system, Arasan provides a Hardware Validation Platform (HVP) which enables early validation of SD 4.1 specification by emulating the SD 4.1 Host at the interface protocol level.

Availability: Arasan is engaging with customers now on the SD 4.1 Total IP Solution, including SD 4.1 Controller IP, UHS-II, Verification IP (VIP), Linux Software Stack in source code, Hardware Validation Platform (HVP), and all supporting documents.

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