Altera launches FPGA reference design for bi-directional power grid automation

Altera and Flexibilis Oy have jointly developed High-availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) reference design for smart grid application. The IEC 62439-3-compliant reference design includes Flexibilis Redundant Switch (FRS) intellectual property (IP) implemented on an Altera's low-power, low-cost Cyclone FPGA or Cyclone V SoC. “A key trend today in developing a smarter power grid is bidirectional communication and real-time control of the equipment in the grid’s transmission and distribution substations,” said Jason Chiang, senior strategic marketing manager in Altera’s Industrial Business Unit. “Our FPGA-based HSR/PRP reference design enables equipment manufactures to build flexibility, performance, reliability and product longevity into their systems while lowering system costs and future proofing designs.” The Flexibilis HSR/PRP IP included in the reference design is a triple-speed 10/100/1000 Mbps Ethernet Layer 2 switch that is scalable from 3 to 8 ports and is compliant with the IEC 62439-3 standard. The IP is optimized for Cyclone V SoC, which feature an integrated dual-core ARM Cortex-A9 processor subsystem. For timing synchronization, the HSR/PRP solution supports IEEE 1588 Precision Time Protocol (PTP) Version 2. “The IEC 62439-3 standard is rapidly evolving, making the flexibility of an FPGA an ideal platform to base ...