electronics engineering Herald                                          
Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
Processor / MCU / DSP
Memory
Analog
Logic and Interface
PLD / FPGA
Power-supply and Industrial ICs
Automotive ICs
Cellphone ICs
Consumer ICs
Computer ICs
Communication ICs (Data & Analog)
RF / Microwave
Subsystems / Boards
Reference Design
Software / Development kits
Test and Measurement
Discrete
Opto
Passives
Interconnect
Sensors
Batteries
Others

Date: 11th July 2011

Unipolar two-phase microstepping motor driver chip from Allegro

Allegro MicroSystems Inc. has announced its latest unipolar two-phase constant-current mode motor driver IC SI-7321M, which is manufactured and developed by Sanken Electric Co., Ltd. in Japan.

Allegro MicroSystems says SI-7321M featured with a unipolar driver design for full- and half-step operation, and 1/4, 1/8, and 1/16 microstepping. The clock-in type input interface allows simplified control logic, with the flexibility of sequencer timing using either rising Clock edge only or both rising and falling edges. Additional flexibility is provided by user-configurable blanking time, and load circuit short or open protection (patent pending). Along with inputs for built-in sense current detection, these features minimize power losses. This new motor driver is targeted at the office automation and industrial equipment markets.

Allegro MicroSystems explains the device has a multi-chip internal structure for lower thermal resistance. The control IC (MIC) and the four power elements (MOSFET) are all separate ICs. The package (HSOP) provides wide output terminals at each corner, further enhancing device thermal dissipation.

The built-in excitation distribution circuit (sequencer) allows motor control using only the Clock signal for simple operations (forward, reverse, hold), with motor speed control by frequency input into Clock pin, and rotation direction control by a dedicated logic input. This eliminates logic signal lines required for conventional phase-input methods, and reduces demand on heavily-used CPUs as per Allegro MicroSystems.


 
Xilinx 7 series FPGA
Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
©2010 Electronics Engineering Herald