Date: 29th May 2011
200 Gb network processor with integrated
traffic management from EZchip
EZchip Semiconductor Ltd. has disclosed product details
of its NP-5 network processor. NP-5 is a 200-Gigabit network
processor (NPU) with integrated 200-Gigabit traffic management
for building ultra-dense 10GE, 40GE and 100GE port line
cards in switches and routers. EZchip says NP-5 provides
a natural scale-up path for customers that use EZchip's
NP-4 100-Gigabit processor.
The NP-5 is fully backward code compatible with the NP-4
offering customers a smooth path to double their line-card
bandwidth and port density with minimal software efforts.
While the NP-4, which is manufactured in a 55nm process,
is scheduled to move to mass production in the second half
of 2011, the NP-5 will be manufactured in a 28nm process
and is scheduled to sample at the end of 2012.
"As the industry's first disclosed 200Gbps network
processor, the NP-5 reinforces EZchip's technology and market
leadership," said Bob Wheeler, senior analyst at The
Linley Group. "The NP-5 also demonstrates the scalability
of EZchip's architecture, which now spans a huge range of
price/performance points."
"Through technological innovations and optimized architecture,
the NP-5 continues our push to provide solutions that enable
customers to multiply the port count and bandwidth as well
as enhance the functionality of their line cards, while
reducing their overall cost," said Amir Eyal, Vice
President Business Development of EZchip Semiconductor.
"Our customers view the NP-5 as the natural progression
of their NP-4 based CESR platforms. As with NP-4, we believe
the NP-5 will provide a significant time to market advantage
over alternative solutions as our customers will be able
to reuse their massive NP-4 software investments."
The NP-5 will enable line cards that feature multiple 40
and 100-Gigabit ports and 10-Gigabit ports.
NP-5 highlights as listed by EZchip includes:
200-Gigabit programmable packet processing
Integrated 200-Gigabit hierarchical traffic management
Ethernet ports with integrated MACs supporting 48x10-Gigabit
/ 12 x 40-Gigabit / 4x100-Gigabit interfaces or combinations
thereof
Enhanced memory management for lookup tables, packet buffering
and statistics, all using commodity DDR3 devices for minimized
cost and power
Integrated fabric adaptor for interfacing to Ethernet-based
switch-fabrics and 10GBase-KR links for direct connection
to the system's backplane
Power management for minimizing line card and system power
dissipation
Enhanced support for video streams and IPTV
On-chip control CPU for host CPU offload
Operations, Administration and Management (OAM) processing
offload
Synchronous Ethernet and IEEE1588v2 offload for Circuit
Emulation Services
IP reassembly for advanced packet processing offload
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