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Date: 25th May 2011

Probe Visualizer for verification and debug of FPGA-based prototype boards

SpringSoft, Inc., has introduced the ProtoLink Probe Visualizer for verification and debug of FPGA-based prototype boards. The new Probe Visualizer uses patented interconnect innovations and software automation with the SpringSoft's HDL debug platform to shorten the verification cycle of off-the-shelf or custom-designed prototypes and validating system-on-chip (SoC) VLSI designs.

SpringSoft's Probe Visualizer is designed to probe large numbers of signals over many cycles, easily add/change signals with fast probe ECO flow, and accelerate debug of designs at the register transfer level (RTL) with SpringSoft's Verdi Automated Debug System as per SpringSoft .

"As the capacity and performance of FPGAs get bigger and better, more companies are moving to a FPGA prototyping approach for system-level validation. But, implementation complexity and debug capabilities are still the critical path factors that get in the way of prototype deployment," said Yu-Chin Hsu, vice president of the Verification Technology and Product Group at SpringSoft. "Probe Visualizer addresses the tremendous verification burden this puts on prototype developers and SoC teams. It uses intuitive, software-based methods to achieve a high level of design visibility and make prototype boards easier to debug starting at the early RTL design stage all the way through final implementation."

"Given the complexity of multi-processor SoC designs, traditional FPGA prototype flows are not practical due to poor design visibility, extended debug cycles, and costly iterations required to change probes," said Wen-Ching Wu, director of Design Automation Technology, Division of Information and Communications Research Laboratories (ICL) at Industrial Technology Research Institute (ITRI). "SpringSoft's ProtoLink Probe approach enables us to adopt a more flexible FPGA verification methodology and brings the power of Verdi debug to the prototype board. We are very encouraged with the early results and look forward to leveraging the real-time visibility and faster debug benefits for a broad range of system prototypes."
More Visibility, Fast Debug

SpringSoft says its probe Visualizer enables users to expand the number of signals probed from 10s to 1000s, save probe data for millions of clock cycles, and add or change signal probes in minutes without rerunning the entire setup process. It can be deployed if desired with SpringSoft's Siloti Visibility Automation System to determine the minimum set of signals that need to be observed for optimal design visibility. Probe signal data is captured and uploaded into SpringSoft's Fast Signal Database (FSDB) for debugging.

A single design compilation is required to use the advanced visualization and automated tracing capabilities of the Verdi HDL debug platform with the Probe Visualizer. Engineers can view waveforms across multiple FPGAs in order to better analyze design behavior and find the root cause of bugs in the context of the RTL code with which they are most familiar, cutting debug time in half compared to traditional approaches claims SpringSoft. They can also simply drag-and-drop additional probed signals if needed from the Verdi environment to the Probe Visualizer. Because probe ECOs are tracked via an integrated revision management system by Probe Visualizer, they also can be quickly traced back to specific configurations as needed during debug.

The Probe Visualizer runs on conventional engineering workstations and consists of an integrated suite of software, hardware and specialized IP that perform FPGA setup, probe instrumentation, and interface tasks. The software automates the pre-partitioned FPGA setup flow and configures each FPGA on the board with a small footprint, soft IP block to extract the pre-selected probed signals. The hardware interface kit includes a custom ProtoLink interface card that can be connected to either the J-connectors or Mictor connectors commonly found on FPGA prototype boards and a high-speed Fibre channel that connects the interface card to the workstation. The interface card has on-board Probe Memory to store all probe data without requiring the use of FPGA resources.

Availability:Now .
Pricing: US$40,000 for one-year subscription license.

For more information about the Probe Visualizer, visit http://www.springsoft.com/products/protolink/.

Xilinx 7 series FPGA
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