Design of Pipeline Analog to Digital Converter

Vivek Tripathi - Senior Staff Engineer , STMicroelectronics
Chandrajit Debnath - Principal Engineer,, STMicroelectronics
Rakesh Malik - Senior Group Manager, STMicroelectronics

The pipeline analog-to-digital converter (ADC) architecture is the most popular topology for video processing ,telecommunications ,digital imaging etc. designs because its speed is comparable to the parallel or flash architecture, whereas the implementation area and power dissipation are significantly smaller.

Both advantages stem from the concurrent operation of the stages, that is, at any time, the first stage operates on the most recent sample while all other stages operate on residues from previous samples. Once the pipeline is primed, converted digital data are always available at every clock cycle.

Also, since the stages operate concurrently, the number of stages used to obtain a given resolution is not constrained by the required throughput rate. Therefore, under some constraints (such as the total resolution), the number of stages may be chosen to minimize the required die area.

Like other ADC architectures, the pipeline ADC power consumption increases with required signal bandwidth, thus making it one of the major contributors to power consumption in a wideband digital video receiver subsystem. Pipeline ADC’s are used in high Speed(10 MSPS -500 MSPS) da...