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Date: 18-05-16

iPDKs for Lfoundry's 150 nm Analog and RF CMOS Process for Keysight Eesof

Germany-based semiconductor fab/foundry service provider LFoundry has made available OpenAccess (OA) based interoperable process design kit (iPDK) for high performance analog and RF design using Keysight Technologies Advanced Design System (ADS) EDA software. iPDKs are validated jointly with Keysight to make it compliant with ADS 2016 and to provide customers access to the full unabridged set of ADS dedicated RF design flow tools in a Linux or Windows environment.

0.15 µm (150 nm) CMOS proven technology LF15A is for fabricating high performance analog, HV, RF or ASIC CMOS chips with up to six levels of aluminum interconnect and a thick metal top, polyimide passivation and I/O voltages of 1.8V, 3.3V and 5.0V. A metal-insulator-metal (MiM) capacitor is made optionally available. For prototypes LFoundry offers Multi-Project Wafer (MPW) with frequent schedules.

"By supporting IPL Alliance conformant iPDKs, LFoundry was able to significantly reduce PDK development time while extending EDA tool coverage for our LF15A technology”, said Andreas Haertl Director PDK Design of LFoundry. “We are now able to bring Keysight EDA’s best of breed RF design simulation solutions to our customers using the LF15A technology. We are looking forward to extend the collaboration with Keysight to offer iPDK support for our 110nm technology”.

“After adopting OpenAccess for interoperability of ADS with other EDA platforms, it was a natural step for Keysight to support IPL Alliance compatible iPDKs”, said Volker Blaschke, Silicon RFIC product marketing manager, Keysight EDA. “LFoundry customers can now design circuits in the 0.15um process node with the LFoundry LF15A iPDK in ADS 2016 and have access to the full unabridged set of ADS dedicated RF design flow tools running in a Linux or Windows environment. This allows the customer to do schematic and layout design using the EDA tool independent device pcells provided with the LFoundry iPDK and perform in situ chip-level or package/module level design optimization with our Momentum/FEM co-simulation. With the availability of GoldenGate inside the ADS design environment, the customer has the choice of either the ADS native circuit simulator or the industry leading silicon RFIC simulator of GoldenGate. Several RFIC related improvements in ADS 2016 to Momentum and to the schematic design flow to enhance design efficiency, as well as an RF aware dummy metal fill generation, offer the LFoundry iPDK user a sophisticated front to back design flow to achieve tape-out ready silicon accurate designs.”

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