Date: 10/08/2015

NAND Flash life enhanced using FPGA

Altera has designed a storage reference design based on its Arria 10 SoCs to double the life of NAND flash and also increase the number of program-erase cycles by up to 7X compared to present NAND flash implementations.

The reference design uses dual-core ARM CortexA9 processor and a solid-state disk (SSD) controller from Mobiveil and NAND optimization software from NVMdurance. NAND flash optimization software monitors the condition of the NAND flash continuously and automatically adjusts the control parameters in real time, extending the flash system’s endurance.

FPGA based solution makes specification updates easier to execute compared to solutions based on ASIC SoC.
Author: Srinivasa Reddy N
Author: Srinivasa Reddy N