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Date: 16-01-14

3D and 2.5 D explored in semiconductor manufacturing for its economics

While the semiconductor industry faces huge hurdles to squeeze more number of transistors further down the 14 nm node, there is more economical alternate way for the chip industry by creating multidevice stacking in three-dimensional as well as in two-dimensional packages.

With the availability of technology to place silicon wafers one above the other and link them through silicon vias (TSV), many companies are now using this technology to pack more functions in single package.

FPGA maker Xilinx is offering high-density FPGA fabric modules made using 2.5D silicon interposer technology from TSMC. ST Microelectronics has integrated its microcontroller and mems and other mixed signal devices in a multichip module. Micron is offering a device called memory cube, where number of memory wafers and the logic wafer stacked one over the other in three-dimensions, both for the benefit of higher density as well as increased memory access speed.

The leading microelectronics technology company IBM has tried out both 3D as well as 2.5 D.

However the road is not still reached the dead-end to make even more smaller transistors ( smaller than 14 nm node). Industry is pinning hope on 450 MM and EUV to take the integration further and reduce the cost of manufacturing to next level.

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