Aldec said it has acquired distribution rights to sell NEC's CyberWorkBench , a C-language based SoC design software for VLSI designers. CyberWorkBench feature synthesizer, simulator, and verifier.
“Aldec has been a trusted name in the EDA industry for 30 years. Combining high level synthesis technology from NEC with Aldec’s verification ecosystem provides designers a full solution for SoC design and validation.” said Kazutoshi Wakabayashi, Senior Expert, Embedded System Solutions Business Center and Green Platform Research Laboratories, NEC.
CyberWorkBench supports writing program/code in a high-level language such as C instead of RTL, which helps in saving time. It is said almost every Japanese VLSI company use CyberWorkBench. CyberWorkBench supports full chip simulation and synthesis. Cyber workbench offers automatic interface with Altera MegaWizard and Xilinx coregen. This 20-year-old EDA software supports both controller and datapath modules and allows VLSI designers to achieve higher design efficiency, low area and high-performance for both ASIC and FPGA chips, as per Aldec.
The high-level synthesizer features automatic pipelining, power optimization, powerful parallelism extraction. Using this tool designers can do C language based formal verification using assertions and properties. There is a structural description generator inside cyber workbench to connect C based modules and legacy RTL models. It also features system C source code debugger and legacy RTL code system C converter.
The basic set in the tool includes Behavioral synthesis, Integrated Device Environment, GUI, behavioral level model generator, automatic design space explorer, cycle level SystemC model generator, testbench generator, RTL generator, overflow checker. There is also options for Bus interface generator, additional RTL output, RTL input, SystemC input, C-level property checker, logic bench connection function, Cycle level Verilog model simulator, source code debugger.
Now VLSI designers can easily buy this tool from Aldec.