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Date: 31-07-13

MStar licenses Tensilica IP Core from Cadence

Cadence Design Systems has announced that MStar Semiconductor has licensed the Tensilica Xtensa DPU (dataplane processor unit) for a new SOC (system on chip) design for the home entertainment and home networking market segments. MStar utilized the customization capabilities of the Xtensa DPU to add application-specific interfaces and instructions which optimized the Xtensa core for the best performance and lower power.

“By leveraging the capabilities of the Xtensa DPU, we were able to better optimize our design for higher efficiency,” stated WK Chia, Vice President of Research and Development, MStar. “As a result, we were able to further enhance our home entertainment platform and provide our customers with more cost-efficient solutions.”

“MStar used our Verilog-like DPU customization capability to optimize their Xtensa core,” stated Jack Guedj, corporate vice president, SoC Realization Group at Cadence. “This has enabled MStar to achieve significant performance improvement over other standard signal processing cores.”

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