Tensilica has announced MoCA expert ComplexIQ as its DPU (dataplane processor unit) IP integration partner.
“We based our MoCA IP solution around the Xtensa DPU because it offers an excellent mix of high embedded CPU performance, small area, code density and low power,” stated Jeff Ford, ComplexIQ’s CEO. “The ability to customize the processor for this application made it an obvious choice. With the Xtensa DPU, ComplexIQ was able to make several optimizations with custom instructions and interfaces that resulted in a significant difference in the overall efficiency of our MoCA solution.”
The MoCA IP from ComplexIQ includes Verilog RTL source code for dedicated dataplane blocks, as well as optimized application code running on tailored Xtensa DPUs. Proprietary application specific instruction extensions, written by ComplexIQ in the Tensilica Instruction Extension (TIE) language, are part of the MoCA IP solution ComplexIQ offers and licenses to its customers. Those customers, in turn, license access to the Xtensa Processor Generator from Tensilica to create an optimal processor configuration for their specific MoCA requirements.
“This is an excellent example of how our growing ecosystem of value-added partners provide algorithm and optimized hardware/software solutions that our customers can use to further speed up their time to market,” stated Jack Guedj, Tensilica’s president and CEO. “By working with ComplexIQ, our customers are able to get MoCA-compliant chips designed very quickly to meet the growing demand for products with this connectivity.”