GLOBALFOUNDRIES has demonstrated functional 20nm silicon wafers with integrated Through-Silicon Vias (TSVs). GLOBALFOUNDRIES utilizes a “via-middle” approach to TSV integration, inserting the TSVs into the silicon after the wafers have completed the Front End of the Line (FEOL) flow and prior to starting the Back End of the Line (BEOL) process. This approach avoids the high temperatures of the FEOL manufacturing process, allowing the use of copper as the TSV fill material. To overcome the challenges associated with the migration of TSV technology from 28nm to 20nm, GLOBALFOUNDRIES engineers have developed a proprietary contact protection scheme. This scheme enabled the company to integrate the TSVs with minimal disruption to the 20nm-LPM platform technology, demonstrating SRAM functionality with critical device characteristics in line with those of standard 20nm-LPM silicon.
“Our industry has been talking about the promise of 3D chip stacking for years, but this development is another sign that the promise will soon be a reality,” said David McCann, vice president of packaging R&D at GLOBALFOUNDRIES. “Our next step is to leverage Fab 8’s advanced TSV capabilities in conjunction with our OSAT partners to assemble and qualify 3D test vehicles for our open supply chain model, providing customers with the flexibility to choose their preferred back-end supply chain.”