ADI's chip Guru speaks to EEHerald on analog, 3D IC, and MEMS
In the analog semiconductor world, anybody who care for utmost precision could not have designed (mostly) any system without using ICs made by Analog Devices Inc (ADI). Though there are many analog vendors with high performance analog IC product offerings, Analog Devices leads over competitors in performance in some of the important categories of Analog semiconductor ICs.
Analog Devices focuses exclusively on high-performance,
where the boundaries of precision are always pushed. This
writer could able to meet analog and mixed signal tech guru
Dr. Samuel H. Fuller, Chief Technology Officer at Analog
Devices. Below is what he says to some of the queries on
Q: We know Analog Devices is performance focused
and high precision chip maker. There is one thing called
'noise' which can't be get rid off, you are trying to give
best out of market in terms of noise performance, do you
foresee in the coming years the noise going down to zero?
Dr. Samuel Fuller: Noise not going to be zero. Lot
of our growth going forward is in application specific standard
products (ASSP). We do ASSPs with digital and analog/mixed
signal part which forcibly pushed you to CMOS technologies
like 65 nm moving on to 40nm and so on. When you go to lower
(nodes) they have less head room for voltages and it becomes
more challenging to be able to get the high performance
or precision. I see a lot of our innovation is around, how
do you continue to build high performance signal processing
signal chains, when you are focused on using 65 nm or 28
Q: You are trying to focus on lot of integration
in SOC. In SOC, there is digital as well as analog and when
it comes precision analog, how much of the precision analog
can go into SOC kind of chips?
Dr. Samuel Fuller: A lot of our SOCs and ASSPs are
at 180 nm and we are moving to 65 nm, there is pressure
that you would like to move to the denser nodes such as
28nm . There is no fundamental road block to coming up with
new circuit architecture that you know work within the much
lower voltage of the denser CMOS. So the Challenge is how
do you come up with a new-- say, converter architecture,
whether it is a SAR (Successive Approximation), Delta Sigma--
you begin to incorporate more and more digital calibration
and predistortion (techniques). There is lot of innovation
on what type of digital calibration is most effective when
we move into deeper nodes.
Q: Using your own fab vs using semiconductor foundries:
Dr. Samuel Fuller: We have two large fabs (semiconductor)
in North America and Europe and we certainly use the foundries
such as TSMC and GlobalFoundries. The way we look at this
is, we need the very fine lithography CMOS for digital centric
products, we go into foundries. Imagine the amount of analog
and linear mixed signal products which needs specialized
processes either for higher voltage or higher power, so
there is lot of demand for such requirements in our own
fabs. We also have MEMS devices like microphones, accelerometer,
gyroscopes, those again are specialized processes and we
have chance in our fabs.
Q: What about the applications which require System
in Package (SIP) instead of system on Chip (SoC)?
Dr. Samuel Fuller: Absolutely, we are looking more
and more of these sort of system in package.
Q: Are you looking at 3D packaging?
Dr. Samuel Fuller: Absolutely, through silicon vias.
The challenge that we got and industry got is to drive the
cost down for building multi die packages, they are competitive,
because when there is still so much of push to try to get
lot out of one die to cut down the assembly cost. But in
reality we think about trying to do everything on one die,
you end up with a very complex processes, the multiple steps
to do the very high voltage device in one step and other
step to do fine line CMOS. But you can get through the silicon
vias and other techniques for doing die on die and then
packaging. ADI is involved in number of industrial consortiums
Q: Are you trying to leverage packaging providing
services from other companies?
Dr. Samuel Fuller: Absolutely, wherever we can. Things
like silicon vias has to be done in the fab. So silicon
vias and other processes we have to do in our own fabs and
our foundries TSMC and globalfoundries are obviously innovating
as well. We all involved in industrial consortiums, so as
we do that, we all go to the same standards. We also buy
bare die for flash memories from other vendors, and what
we need is the standard way of interconnecting silicon vias
from die to die, so that more easily source some of the
chips for 3D packaging. So I think multi die packaging is
going to be an important part of the business.
Other part of our fastest growing package is the chips that
have no package, you know -- the wafer scale packaging.
We are bumping the dye, passivated top, it is such a smaller
footprint, it becomes attractive. some years ago nobody
thought about it, now it is the fastest growing package
type. (These wafer scale package devices are used in muti-die
Q: On the technology of integrating capacitor and
inductor inside chips:
Dr. Samuel Fuller: I think one of ADIís real strengths
in our fabs are the passives. We invested a lot, we would
do trimming as well as resistor-capacitor in-built through
one-time programming, because we can trim them to high accuracy,
then capacitors as well (MEMS caps). For inductors, there
is whole lot of stories. I would say, we have got one line
of isolated products which are built with inductors and
its very popular line for providing good isolation in industrial
application. Its called ISO line . We use inductive coupling
to move the signal and some times power too.
Q: On the sensor integration on silicon:
Dr. Samuel Fuller: We started out with high G accelerometers
4 years back, later we found that for stability control
we need low G accelerometers. Right now, we got a very interesting
product, a medical device where accelerometer measures milli
G and is capable to measure actually the pulse (heart beat).
The most recent MEMS device is microphone. We are looking
at the various experiments now, where we might put multiple
microphone on a single die separated by few millimeters
and will be able to get both directional info as well as
Q: How reliable are these pressure sensors made using
MEMS. I mean in precision as well as the range of measurement?
Dr. Samuel Fuller: Great point! They are certainly
reliable for some of the products, but there are requirements
for number of applications that need to be more robust.
We are looking at next generation of products, its (sensor)
fundamentally has to be open to atmosphere to be able to
get the pressure. Also needs some limiting factors, so that
if we get some really strong acoustic shock, you donít want
to break the membrane. We are working on what kind of mechanical
structure can provide that same limiting factor, so that
it does't get blown up. Where we go beyond that! that's
where we are doing our research and development.
Q: Trend of integrated AFEs over discrete ICs:
Dr. Samuel Fuller: For very low volumes, discrete
ICs in small packages makes lot of sense. Then for mid volumes,
it is ASSPs, where ADI has lot of strength in ASSPs. I am
most excited about our software defined radios, the RF frontend.
In a single die we have both transmitter and receiver, it
goes all the way from RF front end through a mixer -- through
a set of ADC converters and D to A converters feeding the
data to/from FPGAs. We have done all of this in 65 nm. Then
we get into highvolume, we almost build ASICs, those are
very demanding in terms of time schedule, synchronized with
On the size trend Dr. Samuel says the 1mmx 0.5 mm (sand grain) size op-amps and other devices are in demand in mobile applications.
On India development office, Dr. Samuel says "10 % of our design talent is in Bangalore. We have a lot of small design centers around the world in Europe and US. This over here (India) is going to be one of the principle design center"
Pic below: Dr. Samuel Fuller