Detection of TSV voids in 3D stacked IC using acoustic microscopy
Semiconductor technology researcher Imec and PVA Tepla have annonuced breakthrough results in the detection of Through Silicon Vias (TSV) voids in 3D stacked IC technology. After having applied Scanning Acoustic Microscopy to temporary wafer (de)bonding inspection, they successfully used new advanced GHz SAM technology to detect TSV voids at wafer-level after TSV Copper plating. Together, they will continue to investigate the applicability of high-frequency scanning acoustic microscopy for non-destructive submicron void detection.
The initial focus of the collaboration was on developing metrology aimed at detecting voids after temporary wafer bonding, allowing for proper rework of 3D wafers. Temporary wafer (de)bonding and thin wafer handling remains challenging for 3D stacked IC technology. The development of interface particles and voids during the temporary bonding process has a detrimental impact on the subsequent wafer thinning process steps, affecting the wafer thinning performance as well as long-term tool stability and performance. PVA Tepla and imec have developed an automated foup-to-foup, wafer-level process based on 200MHz Scanning Acoustic Microscopy (SAM) using Tepla’s AutoWafer 300 tool.
After demonstrating non-destructive detection of interface particles and voids, imec used PVA Tepla’s high-resolution capability GHz frequency SAM tool to successfully detect voids in TSVs of 5µm diameter and 50µm depth, immediately after plating. Future work will concentrate on further refining the process and implementing GHz SAM capability to increase the spatial detection resolution. Moreover, imec and PVA Tepla will investigate the applicability of GHz SAM to detect submicron voids in TSV and to investigate other aspects related to 3D-technology such as bump connection quality.