At the recently held user conference SNUG-India by Synopsys, Deirdre Hanford, Senior VP of Synopsys was sharing few findings from the recent semiconductor-design research in India and world. She said lot of heavy duty chip-design in 28nm and lower nodes is happening in India, much more than many other VLSI chip-design specialized regions around world. She has even praised SNUG India event where most latest VLSI design papers were presented. She rates SNUG India as number-1 compared to other SNUG events around world.
Synopsys, Mentor Graphics and Cadence are fully focused on India both for the market as well as for design skills. While India demand for chips are expected to rocket up in the coming years, these EDA companies are aiming for extremely engaged role in any such opportunity, either through MNC chip vendors or through Indian startups.
Synopsys takes a better position now in the EDA market with range of highly advanced chip design software offerings. The most recent strength Synopsys gained is by acquiring Magma, the fourth biggest EDA vendor. In the strong IP powered business of EDA, Synopsys leverages its huge bank of IP (both created and acquired) to serve the complete needs of chip design such as design, prototyping using FPGA, verification and manufacturing. Synopsys is becoming one-stop shop for VLSI design software, its hard to emulate Synopsys success for any startup. However the two other leading EDA vendors Cadence and Mentor Graphics are racing closely with Synopsys. Though 2011 has seen Cadence and Mentor trail behind Synopsys little more, they are trying hard to reduce the gap. Despite the tough competition the startups in EDA industry still emerging by offering a unique and highly vertical design software/services.
Wireless communication fables chipmaker Spreadtrum in China is a good example of how Cadence has played key role in Spreadtrum's extra-ordinary growth. Cadence was said to deeply involved with Chinese chip design companies.
We got to see which Indian company will produce millions of complex and advanced chips in a year. Whoever it is, the key drivers are going to be any of three top EDA software vendors. Digital chip design is more about design-reuse rather than totally new innovation. In design re-use the software replicates the process of connecting transistors as per recorded flow with some tweaks and improvements. From million of transistors to billions of transistors and soon trillions of transistors can be wired with press of a button. Again all this done by billion of transistors in the form of a server.
Its easy to tell how simple is the task, but in reality it takes a genius to build transistors out of transistors using process algorithms.