Fabless semiconductor company Tensilica, Inc has moved its R&D center in Pune, India, to a new building with double the space. Tensilica to increase headcount by at least 50 percent in the next year. Tensilica's Pune R&D center is in to developing its dataplane processors (DPUs) used by VLSI chip designers to do complex signal processing tasks, such as audio and baseband signal processing.
"The engineers in our Pune design center are an integral part of our R&D team, and they've tackled some of the most demanding projects," stated Jack Guedj, Tensilica's president and CEO. "We've asked them to take on several challenges and they've proven they have the background to do an excellent job in many engineering areas."
Some of the projects Tensilica engineers have been working on in Pune include: audio and speech codecs for Tensilica's HiFi audio DSPs (digital signal processors), libraries, design verification, application engineering, and the IDE (integrated development environment) for Tensilica's DPUs.
"I'm extremely proud of the team we've assembled here in Pune," stated Subodh Shukla, director of the Pune R&D center. "We've been able to hire some of the top talent from across India because we can offer engineers the opportunity to grow and learn about leading edge processor/DSP architecture and chip design."