Aptina did post layout verification of its image sensor design using Fast 3D software

The image sensor designer Aptina has employed Silicon Frontline's VLSI design tool F3D (Fast 3D) software for post-layout verification of its latest image sensor chips.

Silicon Frontline states in its release, by using its 3D software Aptina's designers are resolving a range of issues including: floating diffusion (sense node) capacitance, inter-pixel coupling, color-filter effects, impact of metal fill and signal channel mismatch without having to build costly prototypes.

With F3D, Aptina designs are released up to 4 months earlier, providing significant cost reduction and an advantageous market position, Silcon Frontline claims.

"We are focused on being the world's best image sensor provider," said Roger Panicacci, VP of Product Development at Aptina. "In order to maintain our position we constantly look for design software that will improve our nanometer and A/MS design's accuracy. Silicon Frontline's F3D fits that bill. With it, we are able to eliminate design steps, like building prototypes to measure the accuracy and capacitance before wafer fabrication."

"We are proud to add Aptina, an innovative leader in CMOS image sensor technology and manufacturing quality, to our list of customers," said Yuri Feinberg, CEO, Silicon Frontline. "They are among the quality-focused customers that have picked us to improve their design productivity and manufacturing quality."