Full qualification of Xilinx Virtex-6 FPGA family on UMC's 40nm process devices

UMC plans to start the volume production shipment of 40nm process devices with the full qualification of the Xilinx Virtex-6 FPGA family.

UMC says, built using Xilinx ASMBL architecture, the Virtex-6 FPGA family delivers 15% high performance and 15% low power consumption compared to 40nm FPGA offerings. The devices operate on a 1.0v core voltage with an available 0.9v low-power option and are supported by development tools delivered by ISE Design Suite 11 and a vast library of IP already available for the 65-nm Virtex-5 FPGA family to ensure productive development and design migration.

"We highly value the ongoing execution of our long time manufacturing partner UMC," said Xilinx CEO Moshe Gavrielov. "We have collaborated together to deliver several generations of industry leading FPGA families."

"This 40nm achievement follows a long history of successful product family launches with Xilinx," said UMC CEO Dr. Shih-Wei Sun. "Today's production readiness of the 40nm Virtex-6 family underscores our ongoing commitment to Xilinx and our long-term partnership."

"The successful qualification of Virtex-6 is the result of the close teamwork between Xilinx and UMC engineers to address the challenges of 40nm high performance technology," said S.C. Chien, Vice President of Advanced Technology Development at UMC. "UMC dedicated significant engineering talent and resources in our joint effort with Xilinx, such as customizing device specifications to their product specifications, delivering DFM for stable yield, fast info-turn vehicle to enhance quality, and quick diagnosis methodology. We are excited to see that our teamwork has paid off with today's milestone."

UMC's independently developed 45/40nm logic process utilizes immersion lithography for its 12 critical layers and incorporates the new technology advancements such as ultra-shallow junction, embedded silicon-germanium and mobility enhancement techniques, and ultra low-k dielectrics.

The Virtex-6 FPGA family comprises three domain-optimized FPGA platforms that deliver different feature mixes, including DSP slices, memory blocks and serial transceivers supporting up to 11.2Gb/s to best address a variety of customer applications. Currently, six out of nine Virtex-6 family base devices are shipping.

All nine are scheduled to be available in production volumes by the end of the second quarter of CY2010.

For more details visit www.umc.com