DDR3 based threaded module prototype for multicore computing

Rambus and Kingston have jointly developed threaded module prototype for multi-core computing with an advantage of improved data throughput by up to 50% at less power consumption.

"As multi-core computing becomes pervasive, DRAM memory subsystems will be severely challenged to deliver the data throughput required," said Craig Hampel, Rambus Fellow. "Our innovative module threading technology employs parallelism to deliver the higher memory bandwidth needed for multi-core systems while reducing overall power consumption."

"Kingston is at the forefront of memory technology working closely with innovators like Rambus to develop advanced solutions," said Dr. Ramon Co, vice president of Worldwide Test Engineering at Kingston Technology. "The collaboration of our experienced teams produced a memory solution that helps overcome a major challenge with multi-core computing."

Threaded memory module technology is based on DDR3 devices on a memory module. The power saving is achieved by partitioning the modules into multiple independent channels that share a common command/address port.
This product is to be displayed at the Intel Developer Forum, scheduled on September 22 - 24, 2009 at Moscone West in San Francisco, CA.