Synfora acquires SoC design tool Esterel Studio from EstrealEDA Technologies

Synfora has acquired Esterel Studio, a tool suite developed by Esterel EDA Technologies. Esterel Studio is based on the Esterel synchronous programming language. This SoC chip design targeted tool, is used to design control-logic intellectual property (IP) blocks and complex reactive systems such as control circuits, embedded systems, and human-machine interface and communication protocols. Estreal Studio is popularly used by most of the leading IC manufacturers.

"Esterel Studio is complementary to the PICO algorithmic synthesis platform and was already part of an integrated flow used by several of our customers," said Synfora CTO Vinod Kathail. "This step is a part of our long-term vision of providing integrated solutions for application accelerators and more control-oriented IP."

Esterel Studio supports all stages of chip design from design to verification and supports textual or graphical design of large state machines with arbitrary embedded data path, animated simulation and debugging. Esterel studio can generate either HDL (Verilog, VHDL) code or C / SystemC models from the same source code.