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28th July 09
ARM, Chartered, IBM, Samsung, and Synopsys
joining hands to develop next level 32/28nm Mobile SoCs
To design advanced semiconductor devices for mobile applications
ARM, Chartered Semiconductor, IBM, Samsung, Synopsys are
collaborating to develop a total technology for designing
and manufacturing of mobile Internet-optimized semiconductor
devices.
This technology tie-up is a strategic move by these leading
semiconductor companies to have technology edge over any
emerging new player in the semiconductor market and the
present competitors.
As per the announcement, ARM is to provide low-power processor
architecture and IPs for mobile applications. IBM, Samsung,
Chartered will work on 32/28-nanometer (nm) low-power/low-leakage,
high-k metal-gate (HKMG) synchronized foundry services through
a Common Platform. EDA expert Synopsys will take care of
providing advanced chip design tools.
It's officially accepted the present semiconductor technology
is reaching fundamental physical limits. But there is always
a scope for new nano technology based processes to make
nano devices using alternate and cheaper technologies.
IBM comments:
"The Common Platform alliance's expanded engagement
approach with ARM, and now Synopsys, means working more
closely together with earlier access to each other's technology
innovations, integrating and optimizing our capabilities
for clients," said Michael J. Cadigan, general manager,
IBM Microelectronics Division, on behalf of the Common Platform
alliance companies. "The benefits are clear and differentiated:
lower risk, lower cost and faster time-to-market."
ARM comments:
"The complexity of advanced manufacturing process
technology requires a tight connection between the physical
IP, processor cores and EDA methodology," said Warren
East, CEO, ARM. "Early collaboration between these
leading companies will significantly improve the performance,
power and area achievable by our partners and deliver increased
value to the end products."
Synopsys comments:
"This unique ARM-Synopsys-Common Platform collaboration
can alleviate costs and risks by harnessing the leading
players in silicon technology, IP, tools and flow enablement
to integrate and optimize the path from software to silicon,"
said Aart de Geus, chairman and CEO of Synopsys. "Through
this alignment, we plan to deliver early 32/28 nanometer
tool and IP enablement, plus a complete, vertically optimized
design solution based on the Synopsys Lynx Design System
to provide customers the lowest cost of design and fastest
time-to-market for next-generation mobile SoC designs."
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