Sumitomo employs Stratix IV GX FPGAs in its LDPC system

Sumitomo Electric Industries is using Altera's 40-nm Stratix IV GX FPGAs for its low-density parity-check (LDPC) system used for developing a high-speed measurement system that verifies the forward error correction (FEC) code for high-speed digital signal processing (DSP).

Sumitomo's LDPC system is targeted at applications such as image processing, next-generation optical memory, high-definition (HD) digital video broadcasting, mobile broadband communications and optical networking.

"Altera's Stratix IV GX FPGA provides us with a cost-effective, single-chip solution that delivers best-in-class performance and data rate speeds, allowing us to realize over 100Gbps performance in our LDPC system," said Mr. Takashi Maehata, assistant general manager, transmission system department, information and communication laboratories, Sumitomo Electric Industries. "Obtaining this level of performance would not have been possible without Stratix IV GX FPGAs and their integrated 8.5Gbps transceivers. As a result of using Altera's Stratix IV GX FPGAs, our LDPC system achieves a throughput of 132-Gbps encoding and 24.48-Gbps decoding."

Stratix IV GX FPGA-based LDPC system interfaces with a multi Gigabit analog/digital converter (ADC) and features a Nios II embedded processor. The embedded processor operates a TCP/IP protocol stack and facilitates the LDPC encoder and decoder.

For know further on Stratix FPGA family visit www.altera.com/pr/stratix4