SiS joins Cadence sponsored Power Forward Initiative

PC chipset vendor SiS has joined the Power Forward Initiative (PFI) and plans to offer a Common Power Format (CPF)-based design solution for its chipset, motherboard, and reference design for systems customers.

The Cadence sponsored Power Forward Initiative has more than 30 member companies mainly fabless chip designers, IP core vendors and pure fab companies. PFI is formed to promote the design and production of more power-efficient electronic devices. CPF was contributed by Cadence to the Si2 Low Power Coalition in December 2006; CPF is now the most widely-deployed low-power intent standard in the industry and available from Si2. The Initiative has also published A Practical Guide to Low-Power Design - User experience. The Guide is available free of charge at www.powerforward.org.

"As a chipset designer, SiS continuously dedicates itself to using innovative computing technologies to provide more efficiency and convenience to users of electronic systems," said Nelson Lee, Marketing Director at SiS. "Our participation in the Power Forward Initiative will help us to serve our customers in need of more power-efficient computing platforms."

"Through its participation in the Power Forward Initiative, SiS hopes to accelerate its customers' migration to more power-efficient design methodologies," said Pankaj Mayor, group director of Business Enablement at Cadence. "We welcome SiS to the Power Forward Initiative where they can work with industry leaders to deliver high-quality, low-power solutions to customers."