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News

   23rd Feb 09

 Low power VLSI design manual co-authored by ARM, Renesas and Synopsys


Engineers from Synopsys, ARM and Renesas have co-authored a manual on Verification Methodology for Low Power (VMM-LP). The VMM-LP book documents the common causes of low power bugs, provides rules and guidelines for low power verification, specifies a SystemVerilog base class library facilitating the setup of a reusable verification environment, and recommends assertions and coverage techniques to accomplish comprehensive low power verification.

This book includes real-world low power verification experience by 30 companies. Content of this book builds on the methodology originally published in the proven Verification Methodology Manual for SystemVerilog book developed by ARM and Synopsys. DVCon event attendees which going to be held in San Jose on February 24, 2009 are provided with a tutorial on this subject.

Low power design consumes more sleepless nights for VLSI designers and verification is major challenge, but the skills are must, so is the necessity of publications such as these.

Here are few comments about this book.

"The task of verifying low power designs presents a significant challenge for today's verification engineers, as most are not yet well-trained on low power concepts," said Jianfeng Liu, senior low power verification methodology engineer at Samsung Electronics. "The Verification Methodology Manual for Low Power is a timely and valuable resource that addresses all aspects of low power verification, providing detailed rules and guidelines."


"Being able to create a power control architecture is more than just having something that looks pretty on paper and, theoretically, meets your power targets," said David Wheelock, SOC power architect at Seagate Technology. "The VMM-LP provides clear insight into the pitfalls and practicality issues for both the design and verification of low power systems. This handy volume comes with specific examples of design and verification issues that have been seen in actual chips. Its rules and recommendations will help move the electronics industry into a much greener future."

Where to buy the book?

The VMM-LP book is available today for purchase through the VMM Central web site (www.vmmcentral.org/vmmlp). Additionally, customers can download a PDF version of the book and register to receive notification about the availability of the source code for the VMM-LP SystemVerilog base classes from VMM Central.


          
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