With more private players getting into satellite and space business. For such companies a processor chip with powerful processor IP such as Arm Cortex-A72 provides some developer advantages over proprietory processor core for tasks such as image processing.
Now you have popular LS1046-Space processor from Teledyne e2v passing stringent total ionizing dose (TID) radiation tests, achieving 100krad resilience. LS1046-Space processor with 64-bit Arm Cortex-A72 processing cores operates up to frequencies of 1.8GHz. LS1046-Space feature 10Gbit Ethernet, PCI-Express (PCIe) 3.0, SPI, I2C, multiple UARTs, etc.
Company says "These results complement those previously obtained in terms of single event latch-up (SEL) and single event upset (SEU) when exposed to heavy-ions up to more than 60MeV.cm²/mg."
This high-reliability processor is based on NXP processor technology with built-in 64-bit DDR4 SDRAM memory controller with 8-bit error corrected code (ECC), plus a 2MByte L2 cache shared across its cores. L1 and L2 caches are both ECC-protected to protect against data corruption. LS1046-Space is offered in a 780-ball BGA package.
It's a good choice for single board computers used in space applications. NASA Level 1 requirements fulfilling processor is suggested for satellite-based imaging related tasks, such as processing/conditioning and image data compression, as well as ultra-low latency communications and on-board decision making leveraging AI algorithms.
“As a company, we have been involved in space projects for over three decades, working with the leading agencies and commercial entities in this sector. Our customers are fully aware of the reputation our processor Ics have gained, as well as the performance and extreme reliability benefits that can be brought to their hardware implementations through using them,” states Thomas GUILLEMAIN, Marketing & Business Development Manager at Teledyne e2v. “These latest radiation results give a strong validation of the value that our radiation-tolerant, compute-intensive processors offer to space applications, with unquestionable reassurance that they can survive in the most extreme operating conditions.”
“We have set out a well-defined road map to follow on from this, with full characterization of the accompanying peripheral interfaces by early 2021, then comprehensive single event functional interrupt mitigation testing by the middle of that year,” he concludes.