The new XJFlash from XJTAG allows you to automatically generate customized programming solution for the flash devices connected to FPGAs on your board. XJFlash automatically generate a custom design for each FPGA/flash combination, allowing you to achieve best programming times. XJFlash can configure a nonvolatile memory irrespective of its type at greater speed when compared to other programming technologies.
Each time when flash memory is programmed, XJFlash will automatically step through four stages namely initialisation, erase, program and verify. Figure below shown timing analysis of these stages. Analysis is done on Spartan 6 XC6SLX9 programming a 2 MByte pseudo-random data file into the FPGA’s SPI configuration PROM.
How to use XJFlash? In order to use XJFlash, all of the data, address and control signals on the flash device(s) must be connected to an FPGA on the target board. This can be a configuration PROM, or a flash device connected to any general purpose I/O pin. These connections can be direct, indirect, dedicated or shared.
Even though the flash is not connected to FPGA, it is possible to configure flash by using a spare pins of FPGA to establish connection to the flash. Unfortunately, it is not possible to use XJFlash if there is no FPGA, but it may be possible to do fast flash programming using the debug interface on a processor. XJFlash benefits to memory devices connected to FPGA SoCs, such as Xilinx Zynq and Altera Cyclone V SoCs, which feature dual ARM Cortex-A9 processors. XJFlash with XJTAG is used as a standalone test system or fully integrated into 3rd Party Test Executives (such as LabVIEW) in systems which also use other Automated Test Equipment (ATE). For more information about XJFlash visit https://www.xjtag.com/products/software/xjflash